hwtLib.peripheral.i2c package¶
Submodules¶
hwtLib.peripheral.i2c.intf module¶
- class hwtLib.peripheral.i2c.intf.I2c(masterDir=DIRECTION.OUT, hdl_name: Optional[Union[str, Dict[str, str]]] = None, loadConfig=True)[source]¶
Bases:
Interface
I2C interface also known as IIC, TWI or Two Wire
If interface is outside of chip it needs pull-up resistors
- HDL IO
scl - of type hwt.interfaces.tristate.TristateClk with dtype=<Bits, 1bit> - MASTER
sda - of type hwt.interfaces.tristate.TristateSig - MASTER
hwtLib.peripheral.i2c.masterBitCntrl module¶
- class hwtLib.peripheral.i2c.masterBitCntrl.I2cBitCntrlCmd(masterDir=DIRECTION.OUT, hdl_name: Optional[Union[str, Dict[str, str]]] = None, loadConfig=True)[source]¶
Bases:
RdSynced
- HDL IO
din - of type hwt.interfaces.std.Signal with dtype=<Bits, 1bit> - MASTER
cmd - of type hwt.interfaces.std.Signal with dtype=<Bits, 3bits> - MASTER
rd - of type hwt.interfaces.std.Signal with dtype=<Bits, 1bit> - SLAVE (Master=IN)
- class hwtLib.peripheral.i2c.masterBitCntrl.I2cBitCntrlCmdAgent(sim: HdlSimulator, intf, allowNoReset=True)[source]¶
Bases:
RdSyncedAgent
- class hwtLib.peripheral.i2c.masterBitCntrl.I2cMasterBitCtrl(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
Translate simple commands into SCL/SDA transitions Each command has 5 states, 0/1/2/3/idle
start: SCL ~~~~~~~~~~~~~~\____ SDA XX/~~~~~~~\______ x | 0 | 1 | 2 | 3 | i repstart SCL ______/~~~~~~~\___ SDA __/~~~~~~~\______ x | 0 | 1 | 2 | 3 | i stop SCL _______/~~~~~~~~~~~ SDA ==\___________/~~~~~ x | 0 | 1 | 2 | 3 | i write SCL ______/~~~~~~~\____ SDA XXX===============XX x | 0 | 1 | 2 | 3 | i read SCL ______/~~~~~~~\____ SDA XXXXXXX=XXXXXXXXXXX x | 0 | 1 | 2 | 3 | i
Timing:
Normal mode
Fast mode
Fscl
100KHz
400KHz
Th_scl
4.0us
0.6us High period of SCL
Tl_scl
4.7us
1.3us Low period of SCL
Tsu:sta
4.7us
0.6us setup time for a repeated start condition
Tsu:sto
4.0us
0.6us setup time for a stop condition
Tbuf
4.7us
1.3us Bus free time between a stop and start condition
- HDL params
CLK_CNTR_WIDTH - default value 16 of type int
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
clk_cnt_initVal - of type hwt.interfaces.std.Signal with dtype=<Bits, 16bits> - SLAVE
i2c - of type hwtLib.peripheral.i2c.intf.I2c - MASTER
cntrl - of type hwtLib.peripheral.i2c.masterBitCntrl.I2cBitCntrlCmd - SLAVE
arbitrationLost - of type hwt.interfaces.std.Signal with dtype=<Bits, 1bit> - MASTER
dout - of type hwt.interfaces.std.Signal with dtype=<Bits, 1bit> - MASTER