hwtLib.examples.hdlObjLists package¶
Example of usage of HObjList for Interface instances.
Submodules¶
hwtLib.examples.hdlObjLists.listOfInterfaces0 module¶
- class hwtLib.examples.hdlObjLists.listOfInterfaces0.ListOfInterfacesSample0(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
Sample unit with HObjList of interfaces (a and b) which is not using items of these HObjList of interfacess and connects list directly to another list
- HDL params
DATA_WIDTH - default value 8 of type int
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
a_0 - of type hwt.interfaces.std.VldSynced - SLAVE
a_1 - of type hwt.interfaces.std.VldSynced - SLAVE
a_2 - of type hwt.interfaces.std.VldSynced - SLAVE
b_0 - of type hwt.interfaces.std.VldSynced - MASTER
b_1 - of type hwt.interfaces.std.VldSynced - MASTER
b_2 - of type hwt.interfaces.std.VldSynced - MASTER
- class hwtLib.examples.hdlObjLists.listOfInterfaces0.ListOfInterfacesSample0ConcatOnly(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
Same thing as
ListOfInterfacesSample0SliceOnly
but direction of interfaces is oposite- HDL params
DATA_WIDTH - default value 8 of type int
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
a0 - of type hwt.interfaces.std.VldSynced - SLAVE
a1 - of type hwt.interfaces.std.VldSynced - SLAVE
a2 - of type hwt.interfaces.std.VldSynced - SLAVE
b_0 - of type hwt.interfaces.std.VldSynced - MASTER
b_1 - of type hwt.interfaces.std.VldSynced - MASTER
b_2 - of type hwt.interfaces.std.VldSynced - MASTER
- class hwtLib.examples.hdlObjLists.listOfInterfaces0.ListOfInterfacesSample0SliceOnly(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
Sample unit with HObjList of interfaces a and three of output interfaces b each interface is connected manually
- HDL params
DATA_WIDTH - default value 8 of type int
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
a_0 - of type hwt.interfaces.std.VldSynced - SLAVE
a_1 - of type hwt.interfaces.std.VldSynced - SLAVE
a_2 - of type hwt.interfaces.std.VldSynced - SLAVE
b0 - of type hwt.interfaces.std.VldSynced - MASTER
b1 - of type hwt.interfaces.std.VldSynced - MASTER
b2 - of type hwt.interfaces.std.VldSynced - MASTER
- class hwtLib.examples.hdlObjLists.listOfInterfaces0.ListOfInterfacesSample0TC(methodName='runTest')[source]¶
Bases:
SimTestCase
hwtLib.examples.hdlObjLists.listOfInterfaces1 module¶
- class hwtLib.examples.hdlObjLists.listOfInterfaces1.ListOfInterfacesSample1(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
Example unit which contains two subuints (u0 and u1) and two HObjList of interfacess (a and b) first items of this interfaces are connected to u0 second to u1
- HDL params
DATA_WIDTH - default value 8 of type int
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
a_0 - of type hwt.interfaces.std.VldSynced - SLAVE
a_1 - of type hwt.interfaces.std.VldSynced - SLAVE
b_0 - of type hwt.interfaces.std.VldSynced - MASTER
b_1 - of type hwt.interfaces.std.VldSynced - MASTER
- HDL components
- class hwtLib.examples.hdlObjLists.listOfInterfaces1.ListOfInterfacesSample1TC(methodName='runTest')[source]¶
Bases:
SimTestCase
- class hwtLib.examples.hdlObjLists.listOfInterfaces1.SimpleSubunit(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
- HDL params
DATA_WIDTH - default value 8 of type int
- HDL IO
c - of type hwt.interfaces.std.VldSynced - SLAVE
d - of type hwt.interfaces.std.VldSynced - MASTER
hwtLib.examples.hdlObjLists.listOfInterfaces2 module¶
- class hwtLib.examples.hdlObjLists.listOfInterfaces2.ListOfInterfacesSample2(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
Example unit which contains two subunits (u0 and u1) and two HObjList of interfacess (a and b) first items of this interfaces are connected to u0 second to u1
- HDL params
DATA_WIDTH - default value 8 of type int
USE_STRB - default value True of type bool
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
a_0 - of type hwtLib.amba.axis.AxiStream - SLAVE
a_1 - of type hwtLib.amba.axis.AxiStream - SLAVE
b_0 - of type hwtLib.amba.axis.AxiStream - MASTER
b_1 - of type hwtLib.amba.axis.AxiStream - MASTER
- HDL components
- class hwtLib.examples.hdlObjLists.listOfInterfaces2.ListOfInterfacesSample2TC(methodName='runTest')[source]¶
Bases:
SimTestCase
- class hwtLib.examples.hdlObjLists.listOfInterfaces2.SimpleSubunit(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
- HDL params
DATA_WIDTH - default value 8 of type int
USE_STRB - default value True of type bool
- HDL IO
c - of type hwtLib.amba.axis.AxiStream - SLAVE
d - of type hwtLib.amba.axis.AxiStream - MASTER
hwtLib.examples.hdlObjLists.listOfInterfaces3 module¶
- class hwtLib.examples.hdlObjLists.listOfInterfaces3.ListOfInterfacesSample3(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
Sample unit with HObjList of interfaces (a and b) which is not using items of these HObjList of interfacess
- HDL params
ADDR_WIDTH - default value 32 of type int
DATA_WIDTH - default value 64 of type int
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
a_0 - of type hwtLib.amba.axi4Lite.Axi4Lite - SLAVE
a_1 - of type hwtLib.amba.axi4Lite.Axi4Lite - SLAVE
a_2 - of type hwtLib.amba.axi4Lite.Axi4Lite - SLAVE
b_0 - of type hwtLib.amba.axi4Lite.Axi4Lite - MASTER
b_1 - of type hwtLib.amba.axi4Lite.Axi4Lite - MASTER
b_2 - of type hwtLib.amba.axi4Lite.Axi4Lite - MASTER
- class hwtLib.examples.hdlObjLists.listOfInterfaces3.ListOfInterfacesSample3TC(methodName='runTest')[source]¶
Bases:
SimTestCase
- class hwtLib.examples.hdlObjLists.listOfInterfaces3.ListOfInterfacesSample3b(hdl_name_override: Optional[str] = None)[source]¶
Bases:
ListOfInterfacesSample3
Sample unit with HObjList of interfaces (a and b) which is not using items of these HObjList of interfacess
- HDL params
ADDR_WIDTH - default value 32 of type int
DATA_WIDTH - default value 64 of type int
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
a_0 - of type hwtLib.amba.axi4Lite.Axi4Lite - SLAVE
a_1 - of type hwtLib.amba.axi4Lite.Axi4Lite - SLAVE
a_2 - of type hwtLib.amba.axi4Lite.Axi4Lite - SLAVE
b_0 - of type hwtLib.amba.axi4Lite.Axi4Lite - MASTER
b_1 - of type hwtLib.amba.axi4Lite.Axi4Lite - MASTER
b_2 - of type hwtLib.amba.axi4Lite.Axi4Lite - MASTER
hwtLib.examples.hdlObjLists.listOfInterfaces4 module¶
- class hwtLib.examples.hdlObjLists.listOfInterfaces4.ListOfInterfacesSample4(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
Example with HObjList of interfaces where interfaces are instances of StructIntf which is interface dynamically generated from c-like structure description
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
a_0 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - SLAVE
a_1 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - SLAVE
a_2 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - SLAVE
b_0 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - MASTER
b_1 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - MASTER
b_2 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - MASTER
- _mkFieldInterface(structIntf: HStruct, field: HStructField)[source]¶
- class hwtLib.examples.hdlObjLists.listOfInterfaces4.ListOfInterfacesSample4TC(methodName='runTest')[source]¶
Bases:
SimTestCase
- class hwtLib.examples.hdlObjLists.listOfInterfaces4.ListOfInterfacesSample4b(hdl_name_override: Optional[str] = None)[source]¶
Bases:
ListOfInterfacesSample4
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
a_0 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - SLAVE
a_1 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - SLAVE
a_2 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - SLAVE
b_0 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - MASTER
b_1 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - MASTER
b_2 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - MASTER
- class hwtLib.examples.hdlObjLists.listOfInterfaces4.ListOfInterfacesSample4c(hdl_name_override: Optional[str] = None)[source]¶
Bases:
ListOfInterfacesSample4b
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
a_0 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - SLAVE
a_1 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - SLAVE
a_2 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - SLAVE
b_0 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - MASTER
b_1 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - MASTER
b_2 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - MASTER
- class hwtLib.examples.hdlObjLists.listOfInterfaces4.ListOfInterfacesSample4d(hdl_name_override: Optional[str] = None)[source]¶
Bases:
ListOfInterfacesSample4b
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
a_0 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - SLAVE
a_1 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - SLAVE
a_2 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - SLAVE
b_0 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - MASTER
b_1 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - MASTER
b_2 - of type hwt.interfaces.structIntf.StructIntf with dtype=struct { <Bits, 8bits, unsigned> f0 struct { <Bits, 8bits, unsigned> f1 <Bits, 8bits, unsigned> f2 }[4] arr0 } - MASTER