hwtLib.abstract package

Submodules

hwtLib.abstract.busEndpoint module

class hwtLib.abstract.busEndpoint.BusEndpoint(structTemplate, intfCls=None, shouldEnterFn=None)[source]

Bases: hwt.synthesizer.unit.Unit

Abstract unit Delegate request from bus to fields of structure (fields are represented by various interfaces) write has higher priority

_images/aafig-4c82404929aabd2c2b88eee1fcefbeb4a18920ef.gif
__init__(structTemplate, intfCls=None, shouldEnterFn=None)[source]
Parameters:
  • structTemplate – instance of HStruct which describes address space of this endpoint
  • intfCls – class of bus interface which should be used
  • shouldEnterFn – function(structField) return (shouldEnter, shouldUse) where shouldEnter is flag that means iterator over this interface should look inside of this actual object and shouldUse flag means that this field should be used (to create interface)
_config()[source]

Configure object parameters

  • setup all parameters on this object, use Param class instances to allow use of parameter inheritance
  • called in __init__ of class
_declr()[source]

declarations

  • do all declarations of externally accessible objects there (Interfaces)
  • _declr method is called after _config
  • if this object is Unit all interfaces are threaten as externally accessible interfaces if this object is Interface all subinterfaces are loaded
static _defaultShouldEnterFn(field)[source]
_getAddrStep()[source]
_getMaxAddr()[source]

” Get maximum address value for this endpoint

_getMinAddr()[source]

” Get minimum address value for this endpoint

_getWordAddrStep()[source]
_mkFieldInterface(structIntf, field)[source]

Instantiate field interface for fields in structure template of this endpoint

Returns:interface for specified field
_parseTemplate()[source]
_shouldEnterForTransTmpl(tmpl)[source]
static _shouldEnterIntf(intf)[source]
Returns:tuple (shouldEnter, shouldYield)
_suggestedAddrWidth()[source]

Based on strut template resolve how many bits for address is needed

connectByInterfaceMap(interfaceMap)[source]

Connect “decoded” struct interface to interfaces specified in iterface map

Parameters:interfaceMap – list of interfaces or tuple (type or interface, name)
classmethod fromInterfaceMap(interfaceMap)[source]

Generate converter by specified struct

Parameters:interfaceMap – take a look at HTypeFromIntfMap if interface is specified it will be automatically connected
getPort(transTmpl)[source]
isInMyAddrRange(addrSig)[source]
propagateAddr(srcAddrSig: hwt.synthesizer.rtlLevel.rtlSignal.RtlSignal, srcAddrStep: int, dstAddrSig: hwt.synthesizer.rtlLevel.rtlSignal.RtlSignal, dstAddrStep: int, transTmpl: hwt.hdl.transTmpl.TransTmpl)[source]
Parameters:
  • srcAddrSig – input signal with address
  • srcAddrStep – how many bits is addressing one unit of srcAddrSig
  • dstAddrSig – output signal for address
  • dstAddrStep – how many bits is addressing one unit of dstAddrSig
  • transTmpl – TransTmpl which has meta-informations about this address space transition
walkFieldsAndIntf(transTmpl, structIntf)[source]
hwtLib.abstract.busEndpoint.inRange(n, lower, end)[source]
hwtLib.abstract.busEndpoint.isPaddingInIntfMap(item)[source]
hwtLib.abstract.busEndpoint.walkStructIntfAndIntfMap(structIntf, intfMap)[source]

hwtLib.abstract.denseMemory module

exception hwtLib.abstract.denseMemory.AllocationError[source]

Bases: Exception

Exception which says that requested allocation can not be performed

class hwtLib.abstract.denseMemory.DenseMemory(cellWidth, clk, rDatapumpIntf=None, wDatapumpIntf=None, parent=None)[source]

Bases: object

Dense memory for simulation purposes with datapump interfaces

Variables:data – memory dict
__init__(cellWidth, clk, rDatapumpIntf=None, wDatapumpIntf=None, parent=None)[source]
Parameters:
  • cellWidth – width of items in memmory
  • clk – clk signal for synchronization
  • parent – parent instance of DenseMemory (memory will be shared with this instance)
_getStruct(offset, transTmpl)[source]
Parameters:
  • offset – global offset of this transTmpl (and struct)
  • transTmpl – instance of TransTmpl which specifies items in struct
_registerOnClock(clk)[source]
calloc(num, size, keepOut=None, initValues=None)[source]

Allocates a block of memory for an array of num elements, each of them size bytes long, and initializes all its bits to zero.

Parameters:
  • num – Number of elements to allocate.
  • size – Size of each element.
  • keepOut – optional memory spacing between this memory region and lastly allocated
  • initValues – iterable of word values to init memory with
Returns:

address of allocated memory
checkRequests(simulator, _)[source]

Check if any request has appeared on interfaces

doRead()[source]
doWrite()[source]
doWriteAck(_id)[source]
getArray(addr, itemSize, itemCnt)[source]

Get array stored in memory

getBits(start, end)[source]

Gets value of bits between selected range from memory

Parameters:
  • start – bit address of start of bit of bits
  • end – bit address of first bit behind bits
Returns:

instance of BitsVal (derived from SimBits type) which contains copy of selected bits
getStruct(addr, structT, bitAddr=None)[source]

Get HStruct from memory

Parameters:
  • addr – address where get struct from
  • structT – instance of HStruct or FrameTmpl generated from it to resove structure of data
  • bitAddr – optional bit precisse address is is not None param addr has to be None
malloc(size, keepOut=None)[source]

Allocates a block of memory of size and initialize it with None (invalid value)

Parameters:
  • size – Size of each element.
  • keepOut – optional memory spacing between this memory region and lastly allocated
Returns:

address of allocated memory
onReadReq()[source]
onWriteReq()[source]
parseReq(req)[source]
hwtLib.abstract.denseMemory.reshapedInitItems(actualCellSize, requestedCellSize, values)[source]

Convert array item size and items cnt while size of array remains unchanged

Parameters:
  • actualCellSize – actual size of item in array
  • requestedCellSize – requested size of item in array
  • values – input array
Returns:

generator of new items of specified characteristik

hwtLib.abstract.discoverAddressSpace module

class hwtLib.abstract.discoverAddressSpace.AddressSpaceProbe(topIntf, getMainSigFn, offset=0)[source]

Bases: object

__init__(topIntf, getMainSigFn, offset=0)[source]
Parameters:
  • topIntf – interface on which should discovery start
  • getMainSigFn – function which gets the main signal form interface which should this code care about usually address
_discoverAddressSpace(topIntf, offset)[source]
_extractStruct(converter, offset)[source]
walkToConverter(mainSig)[source]

walk mainSig down to endpoints and search for any bus converter instance

hwtLib.abstract.discoverAddressSpace.getEpSignal(sig, op)[source]
Parameters:
  • sig – main signal
  • op – operator on this signal
Returns:

signal modified by this operator or none if this operator is creating new datapath
hwtLib.abstract.discoverAddressSpace.getParentUnit(sig)[source]

hwtLib.abstract.streamBuilder module

class hwtLib.abstract.streamBuilder.AbstractStreamBuilder(parent, srcInterface, name=None)[source]

Bases: object

Attention:

this is just abstract class unit classes has to be specified in concrete implementation
Variables:
Attention:

input port is taken from self.end
FifoCls = NotImplemented
JoinFairCls = NotImplemented
JoinPrioritizedCls = NotImplemented
JoinSelectCls = NotImplemented
RegCls = NotImplemented
ResizerCls = NotImplemented
SplitCopyCls = NotImplemented
SplitFairCls = NotImplemented
SplitPrioritizedCls = NotImplemented
SplitSelectCls = NotImplemented
__init__(parent, srcInterface, name=None)[source]
Parameters:
  • parent – unit in which will be all units created by this builder instantiated
  • name – prefix for all instantiated units
  • srcInterface – start of data-path
_findSuitableName(unitName)[source]

find suitable name for component (= name without collisions)

_genericInstance(unitCls, unitName, setParams=<function AbstractStreamBuilder.<lambda>>)[source]

Instantiate generic component and connect basics

Parameters:
  • unitCls – class of unit which is being created
  • unitName – name for unitCls
  • setParams – function which updates parameters as is required (parameters are already shared with self.end interface)
_getIntfCls(intf)[source]

Get real interface class of interface

classmethod _join(joinCls, parent, srcInterfaces, name, configAs, extraConfigFn)[source]

Create builder from many interfaces by joining them together

Parameters:
  • joinCls – join component class which should be used
  • parent – unit where builder should place components
  • srcInterfacecs – sequence of interfaces which should be joined together (lower index = higher priority)
  • configureAs – interface or another object which configuration should be applied
  • extraConfigFn – function which is applied on join unit in configuration phase (can be None)
_propagateClkRstn(u)[source]

Connect clock and reset to unit “u”

buff(items=1, latency=None, delay=None)[source]

Use registers and fifos to create buffer of specified paramters :note: if items <= latency registers are used else fifo is used

Parameters:
  • items – number of items in buffer
  • latency – latency of buffer (number of clk ticks required to get data from input to input)
  • delay – delay of buffer (number of clk ticks required to get data to buffer)
Note:

delay can be used as synchronization method or to solve timing related problems because it will split valid signal path
Note:

if latency or delay is None the most optimal value is used
getClk()[source]

lookup clock signal on parent

getInfCls()[source]

Get class of interface which this builder is currently using.

getRstn()[source]

lookup reset(n) signal on parent

classmethod join_fair(parent, srcInterfaces, name=None, configAs=None, exportSelected=False)[source]

create builder from fairly joined interfaces (round robin for input select)

Parameters:exportSelected – if True join component will have handshaked interface with index of selected input
Note:other parameters same as in .AbstractStreamBuilder.join_fair
split_copy(noOfOutputs)[source]

Clone input data to all outputs

Parameters:noOfOutputs – number of output interfaces of the split
split_copy_to(*outputs)[source]

Same like split_copy, but outputs are automatically connected

Parameters:outputs – ports on which should be outputs of split component connected to
split_fair(noOfOutputs, exportSelected=False)[source]

Create a rund robin selector with number of outputs specified by noOfOutputs

Parameters:
  • noOfOutputs – number of outputs of multiplexer
  • exportSelected – if is True split component will have interface “selectedOneHot” of type VldSynced wich will have one hot index of selected item
split_fair_to(*outputs, exportSelected=False)[source]

Same like split_fair, but outputs are automatically connected

Parameters:
  • outputs – ports on which should be outputs of split component connected to
  • exportSelected – if is True split component will have interface “selectedOneHot” of type VldSynced wich will have one hot index of selected item
split_prioritized(noOfOutputs)[source]

data from input is send to output witch is ready and has highest priority from all ready outputs

Parameters:noOfOutputs – number of output interfaces of the fork
split_prioritized_to(*outputs)[source]

Same like split_prioritized, but outputs are automatically connected

Parameters:outputs – ports on which should be outputs of split component connected to
split_select(outputSelSignalOrSequence, noOfOutputs)[source]

Create a demultiplexer with number of outputs specified by noOfOutputs

Parameters:
  • noOfOutputs – number of outputs of multiplexer
  • outputSelSignalOrSequence – handshaked interface (onehot encoded) to control selected output or sequence of output indexes which should be used (will be repeated)
split_select_to(outputSelSignalOrSequence, *outputs)[source]

Same like split_select, but outputs are automatically connected

Parameters:outputs – ports on which should be outputs of split component connected to

Module contents