hwtLib.amba.axi3.
Axi3
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi3Lite.Axi3Lite
Axi3 bus interface
LEN_WIDTH
= 4¶LOCK_WIDTH
= 2¶_config
()[source]¶Configure object parameters
hwtLib.amba.axi3.
Axi3_addr
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi3Lite.Axi3Lite_addr
, hwtLib.amba.axi_intf_common.Axi_id
Axi3 address channel interface
LEN_WIDTH
= 4¶LOCK_WIDTH
= 2¶_config
()[source]¶Configure object parameters
hwtLib.amba.axi3.
Axi3_addr_withUser
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi3.Axi3_addr
_config
()[source]¶Configure object parameters
hwtLib.amba.axi3.
Axi3_addr_withUserAgent
(intf)[source]¶Bases: hwtLib.amba.sim.agentCommon.BaseAxiAgent
Simulation agent for Axi3_addr_withUser
interface
input/output data stored in list under “data” property data contains tuples (id, addr, burst, cache, len, lock, prot, size, qos, user)
hwtLib.amba.axi3.
Axi3_b
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi3Lite.Axi3Lite_b
, hwtLib.amba.axi_intf_common.Axi_id
Axi3 write response channel interface
_config
()[source]¶Configure object parameters
hwtLib.amba.axi3.
Axi3_bAgent
(intf)[source]¶Bases: hwtLib.amba.sim.agentCommon.BaseAxiAgent
Simulation agent for Axi3_b
interface
input/output data stored in list under “data” property data contains tuples (id, resp)
hwtLib.amba.axi3.
Axi3_r
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi3Lite.Axi3Lite_r
, hwtLib.amba.axi_intf_common.Axi_id
Axi 3 read channel interface
_config
()[source]¶Configure object parameters
hwtLib.amba.axi3.
Axi3_rAgent
(intf)[source]¶Bases: hwtLib.amba.sim.agentCommon.BaseAxiAgent
Simulation agent for Axi4_r
interface
input/output data stored in list under “data” property data contains tuples (id, data, resp, last)
hwtLib.amba.axi3.
Axi3_w
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axis.AxiStream_withId
Axi3 write channel interface
hwtLib.amba.axi3.
Axi3_withAddrUser
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi3.Axi3
Axi3 bus interface with user signals on address channels
_config
()[source]¶Configure object parameters
hwtLib.amba.axi3.
IP_Axi3
[source]¶Bases: hwtLib.amba.axi3Lite.IP_Axi3Lite
IP core interface meta for Axi3 interface
hwtLib.amba.axi3Lite.
Axi3Lite
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwt.synthesizer.interface.Interface
_config
()[source]¶Configure object parameters
_declr
()[source]¶declarations
hwtLib.amba.axi3Lite.
Axi3LiteAgent
(intf)[source]¶Bases: hwt.simulator.agentBase.AgentBase
Composite simulation agent with agent for every axi channel change of enable is propagated to each child
data for each agent is stored in agent for given channel (ar, aw, r, … property)
hwtLib.amba.axi3Lite.
Axi3Lite_addr
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi_intf_common.Axi_hs
_config
()[source]¶Configure object parameters
hwtLib.amba.axi3Lite.
Axi3Lite_addrAgent
(intf)[source]¶Bases: hwtLib.amba.sim.agentCommon.BaseAxiAgent
Variables: | data – iterable of addr |
---|
hwtLib.amba.axi3Lite.
Axi3Lite_b
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶hwtLib.amba.axi3Lite.
Axi3Lite_bAgent
(intf)[source]¶Bases: hwtLib.amba.sim.agentCommon.BaseAxiAgent
Variables: | data – iterable of resp |
---|
hwtLib.amba.axi3Lite.
Axi3Lite_r
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi_intf_common.Axi_hs
_config
()[source]¶Configure object parameters
hwtLib.amba.axi3Lite.
Axi3Lite_w
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi_intf_common.Axi_hs
_config
()[source]¶Configure object parameters
hwtLib.amba.axi3Lite.
Axi3Lite_wAgent
(intf)[source]¶Bases: hwtLib.amba.sim.agentCommon.BaseAxiAgent
Variables: | data – iterable of tuples (data, strb) |
---|
hwtLib.amba.axi3Lite.
AxiLite_rAgent
(intf)[source]¶Bases: hwtLib.amba.sim.agentCommon.BaseAxiAgent
Variables: | data – iterable of tuples (data, resp) |
---|
hwtLib.amba.axi3Lite.
IP_Axi3Lite
[source]¶Bases: hwt.serializer.ip_packager.interfaces.intfConfig.IntfConfig
asQuartusTcl
(buff: List[str], version: str, component, entity: hwt.hdl.entity.Entity, allInterfaces: List[hwt.synthesizer.interface.Interface], thisIf: hwt.synthesizer.interface.Interface)[source]¶Add interface to Quartus tcl
Parameters: |
|
---|
hwtLib.amba.axi4.
Axi4
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi3.Axi3
Basic AMBA AXI4 bus interface
Variables: |
|
---|
LEN_WIDTH
= 8¶LOCK_WIDTH
= 1¶_config
()[source]¶Configure object parameters
hwtLib.amba.axi4.
Axi4_addr
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi3.Axi3_addr
Axi4 address channel interface (axi3 address channel with different size of len and lock signals
and additional qos signal)
LEN_WIDTH
= 8¶LOCK_WIDTH
= 1¶hwtLib.amba.axi4.
Axi4_b
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi3.Axi3_b
Axi4 write response channel interface (same as axi3)
hwtLib.amba.axi4.
Axi4_r
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi3.Axi3_r
Axi4 read channel interface (same as axi3)
hwtLib.amba.axi4.
Axi4_w
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axis.AxiStream
Axi4 write channel interface (Axi3_w without id signal)
hwtLib.amba.axi4.
IP_Axi4
[source]¶Bases: hwtLib.amba.axi3.IP_Axi3
IP core interface meta for Axi4 interface
hwtLib.amba.axi4Lite.
Axi4Lite
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi3Lite.Axi3Lite
Axi4-lite bus interface
hwtLib.amba.axi4Lite.
Axi4Lite_addr
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶hwtLib.amba.axi4Lite.
Axi4Lite_addrAgent
(intf)[source]¶Bases: hwtLib.amba.axi3Lite.Axi3Lite_addrAgent
Variables: | data – iterable of addr |
---|
hwtLib.amba.axi4Lite.
Axi4Lite_b
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶hwtLib.amba.axi4Lite.
Axi4Lite_r
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶hwtLib.amba.axi4Lite.
Axi4Lite_w
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶hwtLib.amba.axi4Lite.
IP_Axi4Lite
[source]¶Bases: hwtLib.amba.axi3Lite.IP_Axi3Lite
IP core meta description for Axi4-lite interface
hwtLib.amba.axi4_rDatapump.
Axi_rDatapump
(axiAddrCls=<class 'hwtLib.amba.axi4.Axi4_addr'>)[source]¶hwtLib.amba.axi4_rDatapump.
TransEndInfo
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwt.interfaces.std.HandshakeSync
hwtLib.amba.axi4_streamToMem.
Axi4streamToMem
[source]¶Bases: hwt.synthesizer.unit.Unit
Most simple DMA for AXI4 interface.
0x0 control reg.
rw bit 0 - on/off (1 means on) r bit 1 - idle
0x4 baseAddr
Length of written data is specified by DATA_LEN. Input data is splited on smaller frames to fit MAX_BUTST_LEN.
If there is transaction pending idle flag is 0, if on/off is set to 0 in this state unit continues until all data are send and then stayes off. This could be use as synchronization with the software.
or unit is enabled and driver disables it only for the time of reading.
_config
()[source]¶Configure object parameters
hwtLib.amba.axi4_wDatapump.
Axi_wDatapump
(axiAddrCls=<class 'hwtLib.amba.axi4.Axi4_addr'>, axiWCls=<class 'hwtLib.amba.axi4.Axi4_w'>)[source]¶Bases: hwtLib.amba.axi_datapump_base.Axi_datapumpBase
__init__
(axiAddrCls=<class 'hwtLib.amba.axi4.Axi4_addr'>, axiWCls=<class 'hwtLib.amba.axi4.Axi4_w'>)[source]¶Initialize self. See help(type(self)) for accurate signature.
hwtLib.amba.axi4_wDatapump.
BFifoIntf
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwt.interfaces.std.Handshaked
hwtLib.amba.axi4_wDatapump.
WFifoIntf
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwt.interfaces.std.Handshaked
hwtLib.amba.axiDatapumpIntf.
AddrSizeHs
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwt.interfaces.std.Handshaked
_config
()[source]¶Configure object parameters
hwtLib.amba.axiDatapumpIntf.
AddrSizeHsAgent
(intf)[source]¶Bases: hwt.interfaces.agents.handshaked.HandshakedAgent
hwtLib.amba.axiDatapumpIntf.
AxiRDatapumpIntf
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwt.synthesizer.interface.Interface
Interface of read datapump driver
_config
()[source]¶Configure object parameters
hwtLib.amba.axiDatapumpIntf.
AxiRDatapumpIntfAgent
(intf)[source]¶Bases: hwt.simulator.agentBase.AgentBase
Composite agent with agent for every AxiRDatapumpIntf channel enable is shared
enable
¶hwtLib.amba.axiDatapumpIntf.
AxiWDatapumpIntf
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwt.synthesizer.interface.Interface
Interface of write datapump driver
_config
()[source]¶Configure object parameters
hwtLib.amba.axi_datapump_base.
Axi_datapumpBase
(axiAddrCls=<class 'hwtLib.amba.axi4.Axi4_addr'>)[source]¶Bases: hwt.synthesizer.unit.Unit
Variables: |
|
---|
__init__
(axiAddrCls=<class 'hwtLib.amba.axi4.Axi4_addr'>)[source]¶Initialize self. See help(type(self)) for accurate signature.
_config
()[source]¶Configure object parameters
hwtLib.amba.axi_datapump_utils.
connectDp
(parent, controller, datapump, axi, exclude=None)[source]¶Connect datapump with it’s controller(s) and axi
Parameters: |
|
---|
hwtLib.amba.axi_intf_common.
Axi_hs
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwt.interfaces.std.HandshakeSync
AXI handshake interface with ready and valid signal (same as HandshakeSync just vld is valid and rd is ready) transaction happens when both ready and valid are high
Variables: |
|
---|
hwtLib.amba.axi_intf_common.
Axi_id
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwt.synthesizer.interface.Interface
hwtLib.amba.axi_intf_common.
Axi_strb
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwt.synthesizer.interface.Interface
hwtLib.amba.axi_intf_common.
Axi_user
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwt.synthesizer.interface.Interface
hwtLib.amba.axis.
AxiStream
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axis.AxiStream_withoutSTRB
, hwtLib.amba.axi_intf_common.Axi_strb
AxiStream_withoutSTRB
with strb signal
Variables: | strb – byte strobe signal, has bit for each byte of data, data valid if corresponding bit ins strb signal is high |
---|
_config
()[source]¶Configure object parameters
hwtLib.amba.axis.
AxiStreamAgent
(intf)[source]¶Bases: hwtLib.amba.sim.agentCommon.BaseAxiAgent
Simulation agent for AxiStream
interface
input/output data stored in list under “data” property data contains tuples (data, strb, last)
hwtLib.amba.axis.
AxiStream_withId
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi_intf_common.Axi_id
, hwtLib.amba.axis.AxiStream
AxiStream
with id signal
Variables: | id – id signal, usually identifies type or destination of frame |
---|
_config
()[source]¶Configure object parameters
hwtLib.amba.axis.
AxiStream_withIdAgent
(intf)[source]¶Bases: hwtLib.amba.sim.agentCommon.BaseAxiAgent
Simulation agent for AxiStream_withId
interface
input/output data stored in list under “data” property data contains tuples (id, data, strb, last)
hwtLib.amba.axis.
AxiStream_withUserAndNoStrb
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axis.AxiStream_withoutSTRB
, hwtLib.amba.axi_intf_common.Axi_user
AxiStream_withoutSTRB
with user signal
Variables: | user – generic signal with user specified meaning |
---|
hwtLib.amba.axis.
AxiStream_withUserAndStrb
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axis.AxiStream
, hwtLib.amba.axi_intf_common.Axi_user
AxiStream
with user signal
Variables: | user – generic signal with user specified meaning |
---|
_config
()[source]¶Configure object parameters
hwtLib.amba.axis.
AxiStream_withUserAndStrbAgent
(intf)[source]¶Bases: hwtLib.amba.sim.agentCommon.BaseAxiAgent
Simulation agent for AxiStream_withUserAndStrb
interface
input/output data stored in list under “data” property data contains tuples (data, strb, user, last)
hwtLib.amba.axis.
AxiStream_withoutSTRB
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwtLib.amba.axi_intf_common.Axi_hs
Bare AMBA AXI-stream interface
Variables: |
|
---|---|
Attention: | no checks are made for endianity, this is just information |
Note: | bigendian for interface means that items which are send through this interface has reversed byte endianity that means that most significant byte is is on lower address than les significant ones f.e. litle endian value 0x1a2b will be 0x2b1a but iterface itselelf is not reversed in any way |
_config
()[source]¶Configure object parameters
hwtLib.amba.axis.
AxiStream_withoutSTRBAgent
(intf)[source]¶Bases: hwtLib.amba.sim.agentCommon.BaseAxiAgent
Simulation agent for AxiStream_withoutSTRB
interface
input/output data stored in list under “data” property data contains tuples (data, strb, last)
hwtLib.amba.axis.
IP_AXIStream
[source]¶Bases: hwt.serializer.ip_packager.interfaces.intfConfig.IntfConfig
Class which specifies how to describe AxiStream interfaces in IP-core
hwtLib.amba.fullDuplexAxiStream.
FullDuplexAxiStream
(masterDir=<DIRECTION.OUT: 1>, asArraySize=None, loadConfig=True)[source]¶Bases: hwt.synthesizer.interface.Interface