hwtLib.examples.builders package¶
Example of usage of builder classes. Builder class is something which takes interface as an input and can be used to automatically instantiate, configure and connect various component to that interface. Components like buffers, CDC, parsers, inteconects, decoders, interface adapters can be easily instantiated using such a class.
Submodules¶
hwtLib.examples.builders.ethAddrUpdater module¶
- class hwtLib.examples.builders.ethAddrUpdater.EthAddrUpdater(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
This is example unit which reads dst and src addresses(MAC and IPv4) from ethernet frame stored in memory and writes this addresses in reverse direction into second frame.
- HDL params
ADDR_WIDTH - default value 32 of type int
DATA_WIDTH - default value 64 of type int
ID_WIDTH - default value 6 of type int
ADDR_USER_WIDTH - default value 0 of type int
ALIGNAS - default value 64 of type int
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
axi_m - of type hwtLib.amba.axi3.Axi3 - MASTER
packetAddr - of type hwt.interfaces.std.Handshaked - SLAVE
- HDL components
AxiVirtualDma_rReader_0 - of type hwtLib.structManipulators.structReader.StructReader
AxiVirtualDma_rDataPump_0 - of type hwtLib.amba.datapump.r.Axi_rDatapump
AxiVirtualDma_wWriter_0 - of type hwtLib.structManipulators.structWriter.StructWriter
AxiVirtualDma_wDataPump_0 - of type hwtLib.amba.datapump.w.Axi_wDatapump
gen_packetAddr_splitCopy_0 - of type hwtLib.handshaked.splitCopy.HsSplitCopy
gen_src_fifo_0 - of type hwtLib.handshaked.fifo.HandshakedFifo
gen_dst_fifo_0 - of type hwtLib.handshaked.fifo.HandshakedFifo
gen_src_fifo_1 - of type hwtLib.handshaked.fifo.HandshakedFifo
gen_dst_fifo_1 - of type hwtLib.handshaked.fifo.HandshakedFifo
hwtLib.examples.builders.handshakedBuilderSimple module¶
- class hwtLib.examples.builders.handshakedBuilderSimple.HandshakedBuilderSimple(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
Simple example of HsBuilder which can build components for Handshaked interfaces
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
a - of type hwt.interfaces.std.Handshaked - SLAVE
b - of type hwt.interfaces.std.Handshaked - MASTER
- HDL components
gen_a_reg_0 - of type hwtLib.handshaked.reg.HandshakedReg
gen_a_fifo_0 - of type hwtLib.handshaked.fifo.HandshakedFifo
gen_a_reg_1 - of type hwtLib.handshaked.reg.HandshakedReg
hwtLib.examples.builders.hsBuilderSplit module¶
- class hwtLib.examples.builders.hsBuilderSplit.HsBuilderSplit(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
Example of HsBuilder.split_* functions
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
a - of type hwt.interfaces.std.Handshaked - SLAVE
a_0 - of type hwt.interfaces.std.Handshaked - MASTER
a_1 - of type hwt.interfaces.std.Handshaked - MASTER
a_2 - of type hwt.interfaces.std.Handshaked - MASTER
b - of type hwt.interfaces.std.Handshaked - SLAVE
b_0 - of type hwt.interfaces.std.Handshaked - MASTER
b_1 - of type hwt.interfaces.std.Handshaked - MASTER
b_2 - of type hwt.interfaces.std.Handshaked - MASTER
b_selected - of type hwt.interfaces.std.Handshaked - MASTER
c - of type hwt.interfaces.std.Handshaked - SLAVE
c_0 - of type hwt.interfaces.std.Handshaked - MASTER
c_1 - of type hwt.interfaces.std.Handshaked - MASTER
d - of type hwt.interfaces.std.Handshaked - SLAVE
d_0 - of type hwt.interfaces.std.Handshaked - MASTER
d_1 - of type hwt.interfaces.std.Handshaked - MASTER
d_2 - of type hwt.interfaces.std.Handshaked - MASTER
e - of type hwt.interfaces.std.Handshaked - SLAVE
e_0 - of type hwt.interfaces.std.Handshaked - MASTER
e_1 - of type hwt.interfaces.std.Handshaked - MASTER
e_2 - of type hwt.interfaces.std.Handshaked - MASTER
e_select - of type hwt.interfaces.std.Handshaked - SLAVE
- HDL components
builderFromA_reg_0 - of type hwtLib.handshaked.reg.HandshakedReg
builderFromA_reg_1 - of type hwtLib.handshaked.reg.HandshakedReg
builderFromA_fifo_1 - of type hwtLib.handshaked.fifo.HandshakedFifo
builderFromA_reg_2 - of type hwtLib.handshaked.reg.HandshakedReg
builderFromA_splitCopy_2 - of type hwtLib.handshaked.splitCopy.HsSplitCopy
gen_b_splitFair_0 - of type hwtLib.handshaked.splitFair.HsSplitFair
gen_c_splitPrio_0 - of type hwtLib.handshaked.splitPrioritized.HsSplitPrioritized
gen_d_select_0 - of type hwtLib.handshaked.splitSelect.HsSplitSelect
gen_e_select_0 - of type hwtLib.handshaked.splitSelect.HsSplitSelect
hwtLib.examples.builders.hwException module¶
- exception hwtLib.examples.builders.hwException.ExampleHwException0(hw_args=None, *args, **kwargs)[source]¶
Bases:
InHwError
An example of InHwError error. This object behaves as a regular python exception and can be used in
hwtLib.abstract.hwExceptionCtx.HwExceptionCtx
functions which are construction an exception raising/catching logic.
- exception hwtLib.examples.builders.hwException.ExampleHwException1(hw_args=None, *args, **kwargs)[source]¶
Bases:
InHwError
- class hwtLib.examples.builders.hwException.HwExceptionCatch(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
An example of
hwtLib.abstract.hwExceptionCtx.HwExceptionCtx
usage.- (a handshaked wire which will stall until reset if 0,1 or 2 appears in data,
only exception caused by value 1 can be handled)
- class hwtLib.examples.builders.hwException.HwExceptionRaise(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
An example of
hwtLib.abstract.hwExceptionCtx.HwExceptionCtx
usage.- (a handshaked wire which will stall until exception is handled, however only exception caused by value 1
has an interface for handlig and thus all other exceptions will cause stall until reset)
hwtLib.examples.builders.pingResponder module¶
- class hwtLib.examples.builders.pingResponder.PingResponder(hdl_name_override: Optional[str] = None)[source]¶
Bases:
Unit
Listen for echo request on rx axi stream interface and respond with echo response on tx interface
- HDL params
DATA_WIDTH - default value 32 of type int
IS_BIGENDIAN - default value True of type bool
USE_STRB - default value True of type bool
- HDL IO
clk - of type hwt.interfaces.std.Clk with dtype=<Bits, 1bit> - SLAVE
rst_n - of type hwt.interfaces.std.Rst_n with dtype=<Bits, 1bit> - SLAVE
myIp - of type hwt.interfaces.std.Signal with dtype=<Bits, 32bits> - SLAVE
rx - of type hwtLib.amba.axis.AxiStream - SLAVE
tx - of type hwtLib.amba.axis.AxiStream - MASTER
- HDL components
gen_rx_parser_0 - of type hwtLib.amba.axis_comp.frame_parser._parser.AxiS_frameParser
deparsed_deparser_0 - of type hwtLib.amba.axis_comp.frame_deparser._deparser.AxiS_frameDeparser
- connect_resp(resp, deparserIn, sendingReply)[source]¶
Connect response data on inputs of frame deparser
- Parameters
resp – registers with response data
deparserIn – input interface of frame deparser
sendingRepply – flag which signalizes that data should be deparsed into frame and send
- icmp_checksum(header)[source]¶
- Note
we do not need to care about endianity because parser/deparser will swap it for us and we can work with little endians only
- Returns
checksum for icmp header
- req_load(parsed, regs, freeze)[source]¶
Load request from parser input into registers
- Parameters
parsed – input interface with parsed fields of ICPM frame
regs – registers for ICMP frame
freeze – signal to freeze value in registers
def_val – dictionary item from regs: default value
- Attention
dst and src are swapped