hwtLib.logic package

Submodules

hwtLib.logic.bcdToBin module

class hwtLib.logic.bcdToBin.BcdToBin(hdl_name_override: Optional[str] = None)[source]

Bases: Unit

Convert a BCD number to binary encoding This uses the double-dabble algorithm in reverse. The conversion of a BCD number to an n-bit binary number will take n+3 cycles to complete.

based on: https://github.com/kevinpt/vhdl-extras/blob/master/rtl/extras/bcd_conversion.vhdl

HDL params

  • BCD_DIGITS - default value 3 of type int

HDL IO
schematic

hwtLib.logic.binToBcd module

class hwtLib.logic.binToBcd.BinToBcd(hdl_name_override: Optional[str] = None)[source]

Bases: Unit

Convert binary to BCD (Binary coded decimal) format (BCD is a format where each 4 bites represents a single decimal digit 0-9)

based on https://github.com/kb000/bin2bcd/blob/master/rtl/bin2bcd32.v

HDL params

  • INPUT_WIDTH - default value 64 of type int

HDL IO
schematic
static decadic_deciamls_for_bin(bin_width: int)[source]

hwtLib.logic.binToOneHot module

class hwtLib.logic.binToOneHot.BinToOneHot(hdl_name_override: Optional[str] = None)[source]

Bases: Unit

Little endian encoded number to number in one-hot encoding

HDL params

  • DATA_WIDTH - default value 8 of type int

HDL IO
schematic
class hwtLib.logic.binToOneHot.BinToOneHotTC(methodName='runTest')[source]

Bases: SimTestCase

classmethod setUpClass()[source]

Hook method for setting up class fixture before running tests in the class.

test_basic()[source]
hwtLib.logic.binToOneHot.binToOneHot(sig, en=1)[source]

hwtLib.logic.bitonicSorter module

class hwtLib.logic.bitonicSorter.BitonicSorter(cmpFn=<function BitonicSorter.<lambda>>)[source]

Bases: Unit

Bitonic sorter of arbitrary data

HDL params

  • ITEMS - default value 2 of type int

  • DATA_WIDTH - default value 64 of type int

  • SIGNED - default value False of type bool

HDL IO
schematic
__init__(cmpFn=<function BitonicSorter.<lambda>>)[source]
Parameters

cmpFn – function (item0, item1) if returns true, items are not swaped

bitonic_compare(cmpFn, x, layer, offset)[source]
bitonic_merge(cmpFn, x, layer, offset)[source]
bitonic_sort(cmpFn, x, layer=0, offset=0)[source]
class hwtLib.logic.bitonicSorter.BitonicSorterTC(methodName='runTest')[source]

Bases: SimTestCase

SIM_TIME = 40000
getOutputs()[source]
setInputs(values)[source]
classmethod setUpClass()[source]

Hook method for setting up class fixture before running tests in the class.

test_reversed()[source]
test_sorted()[source]

hwtLib.logic.cntrGray module

class hwtLib.logic.cntrGray.GrayCntr(hdl_name_override: Optional[str] = None)[source]

Bases: Unit

Counter for gray code

HDL params

  • DATA_WIDTH - default value 4 of type int

  • INIT_VAL - default value 0 of type int

HDL IO
schematic
class hwtLib.logic.cntrGray.GrayCntrTC(methodName='runTest')[source]

Bases: SimTestCase

classmethod setUpClass() → Unit[source]

Hook method for setting up class fixture before running tests in the class.

test_count()[source]
hwtLib.logic.cntrGray.binToGray(sigOrVal) → RtlSignalBase[source]

Convert value or signal from binary encoding to gray encoding

hwtLib.logic.countLeading module

class hwtLib.logic.countLeading.CountLeadingOnes(hdl_name_override: Optional[str] = None)[source]

Bases: _CountLeading

Count leading zeros in bit vector

HDL params

  • DATA_WIDTH - default value 2 of type int

HDL IO
schematic
class hwtLib.logic.countLeading.CountLeadingZeros(hdl_name_override: Optional[str] = None)[source]

Bases: _CountLeading

Count leading zeros in bit vector

HDL params

  • DATA_WIDTH - default value 2 of type int

HDL IO
schematic
class hwtLib.logic.countLeading._CountLeading(hdl_name_override: Optional[str] = None)[source]

Bases: Unit

Count leading zeros/ones in bit vector

classmethod _count_leading_recurse(data_in: RtlSignal, bit_to_count: int)[source]

Construct a balanced tree for counter of leading 0/1 :atterntion: result is not final result

classmethod count_leading(data_in: RtlSignal, data_out: RtlSignal, bit_to_count: int)[source]

hwtLib.logic.crc module

class hwtLib.logic.crc.Crc(hdl_name_override: Optional[str] = None)[source]

Bases: Unit

Crc generator for any crc, polynome can be string in usual format or integer (“x^3+x+1” or 0b1011)

HDL params

  • DATA_WIDTH - default value 16 of type int

  • IN_IS_BIGENDIAN - default value False of type bool

  • LATENCY - default value 1 of type int

  • MASK_GRANULARITY - default value 8 of type int

HDL IO
schematic
build_crc_xor_matrix(state_in_bits: List[RtlSignal], poly_bits: List[int], data_in_bits: List[RtlSignal]) → List[RtlSignal][source]

build xor tree for CRC computation

setConfig(crcConfigCls)[source]

Apply configuration from CRC configuration class

hwtLib.logic.crc._example_Crc()[source]

hwtLib.logic.crcComb module

class hwtLib.logic.crcComb.CrcComb(hdl_name_override: Optional[str] = None)[source]

Bases: Unit

CRC generator, polynomial can be string in usual format or integer (“x^3+x+1” or 0b1011)

Variables

  • ~.DATA_WIDTH – width of data in signal

  • ~.POLY – specified CRC polynome, str, int or Bits value

  • ~.POLY_WIDTH – width of POLY

  • ~.REFIN – This is a boolean parameter. If it is FALSE, input bytes are processed with bit 7 being treated as the most significant bit (MSB) and bit 0 being treated as the least significant bit. If this parameter is FALSE, each byte is reflected before being processed.

  • ~.REFOUT – Same as REFIN except for output

  • ~.XOROUT – value to xor result with

HDL params

  • DATA_WIDTH - default value 11 of type int

  • IN_IS_BIGENDIAN - default value False of type bool

HDL IO
schematic
classmethod applyCrcXorMatrix(crcMatrix: List[List[List[int]]], inBits: List[RtlSignal], stateBits: List[Union[RtlSignal, BitsVal]], refin: bool) → List[source]
static buildCrcXorMatrix(data_width: int, polyBits: List[bool]) → List[Tuple[List[bool], List[bool]]][source]
Parameters

  • data_width – number of bits in input (excluding bits of signal wit current crc state)

  • polyBits – list of bits in specified polynome

Note

all bits are in format LSB downto MSB

Returns

crc_mask contains rows where each row describes which bits should be XORed to get bit of resut row is [mask_for_state_reg, mask_for_data]

static parsePoly(POLY, POLY_WIDTH) → List[int][source]
Returns

list of bits from polynome, extra MSB 1 is added len of this list is POLY_WIDTH + 1

setConfig(crcConfigCls)[source]

Apply configuration from CRC configuration class

hwtLib.logic.crcPoly module

Library of common CRC configurations

note

POLY is the polynome of CRC and specifies which bits should be xored together.

note

WIDTH - specifies the width of CRC state/value

note

REFIN - If it is True the bits in each byte are reversed before processing.

note

REFOUT If it is set to FALSE, the final value in the register is fed into the XOROUT stage directly, otherwise, if this parameter is TRUE, the final register value is reflected first.

note

XOROUT This is an WIDTH-bit value. It is XORed to the final register value (after the REFOUT) stage before the value is returned as the official checksum.

note

http://reveng.sourceforge.net/crc-catalogue/all.htm

note

https://github.com/nanpuyue/crc/blob/master/CRC.txt

class hwtLib.logic.crcPoly.CRC3_ROHC[source]

Bases: CRC_POLY

CRC-3/ROHC (Robust header compression rfc3095)

CHECK = 6
INIT = 7
POLY = 3
REFIN = True
REFOUT = True
RESIDUE = 0
WIDTH = 3
class hwtLib.logic.crcPoly.CRC_1[source]

Bases: CRC_POLY

also known as parity bit

POLY = 1
WIDTH = 1
class hwtLib.logic.crcPoly.CRC_10[source]

Bases: CRC_POLY

Used in ATM; I.610

POLY = 563
WIDTH = 10
class hwtLib.logic.crcPoly.CRC_10_CDMA2000[source]

Bases: CRC_POLY

Used in mobile networks

POLY = 985
WIDTH = 10
class hwtLib.logic.crcPoly.CRC_10_GSM[source]

Bases: CRC_POLY

Used in mobile networks

POLY = 373
WIDTH = 10
class hwtLib.logic.crcPoly.CRC_11[source]

Bases: CRC_POLY

Used in FlexRay

POLY = 901
WIDTH = 11
class hwtLib.logic.crcPoly.CRC_12[source]

Bases: CRC_POLY

Used in telecom systems

POLY = 2063
WIDTH = 12
class hwtLib.logic.crcPoly.CRC_12_CDMA2000[source]

Bases: CRC_POLY

Used in mobile networks

POLY = 3859
WIDTH = 12
class hwtLib.logic.crcPoly.CRC_12_GSM[source]

Bases: CRC_POLY

Used in mobile networks

POLY = 3377
WIDTH = 12
class hwtLib.logic.crcPoly.CRC_13_BBC[source]

Bases: CRC_POLY

Used in Time signal, Radio teleswitch

POLY = 7413
WIDTH = 13
class hwtLib.logic.crcPoly.CRC_14_DARC[source]

Bases: CRC_POLY

Used in Data Radio Channel[19]

POLY = 2053
WIDTH = 14
class hwtLib.logic.crcPoly.CRC_14_GSM[source]

Bases: CRC_POLY

Used in mobile networks

POLY = 8237
WIDTH = 14
class hwtLib.logic.crcPoly.CRC_15_CAN[source]

Bases: CRC_POLY

POLY = 17817
WIDTH = 15
class hwtLib.logic.crcPoly.CRC_15_MPT1327[source]

Bases: CRC_POLY

POLY = 26645
WIDTH = 15
class hwtLib.logic.crcPoly.CRC_16_ARINC[source]

Bases: CRC_POLY

Used in ACARS applications

POLY = 41003
WIDTH = 16
class hwtLib.logic.crcPoly.CRC_16_CCITT[source]

Bases: CRC_POLY

Used in X.25, V.41, HDLC FCS, XMODEM, Bluetooth, PACTOR, SD, DigRF, many others; Also known as CRC_CCITT

INIT = 65535
POLY = 4129
WIDTH = 16
class hwtLib.logic.crcPoly.CRC_16_CDMA2000[source]

Bases: CRC_POLY

Used in mobile networks

POLY = 51303
WIDTH = 16
class hwtLib.logic.crcPoly.CRC_16_Chakravarty[source]

Bases: CRC_POLY

Used in Optimal for payloads ≤64 bits

POLY = 12053
WIDTH = 16
class hwtLib.logic.crcPoly.CRC_16_DECT[source]

Bases: CRC_POLY

Used in cordless telephones

POLY = 1417
WIDTH = 16
class hwtLib.logic.crcPoly.CRC_16_DNP[source]

Bases: CRC_POLY

Used in DNP, IEC 870, M-Bus

POLY = 15717
WIDTH = 16
class hwtLib.logic.crcPoly.CRC_16_IBM[source]

Bases: CRC_POLY

Used in Bisync, Modbus, ANSI X3.28, SIA DC-07, many others; Also known as CRC_16 and CRC_16-ANSI

POLY = 32773
REFIN = True
REFOUT = True
WIDTH = 16
class hwtLib.logic.crcPoly.CRC_16_OpenSafety_A[source]

Bases: CRC_POLY

Used in safety fieldbus

POLY = 22837
WIDTH = 16
class hwtLib.logic.crcPoly.CRC_16_OpenSafety_B[source]

Bases: CRC_POLY

Used in safety fieldbus

POLY = 30043
WIDTH = 16
class hwtLib.logic.crcPoly.CRC_16_Profibus[source]

Bases: CRC_POLY

Used in fieldbus networks

POLY = 7631
WIDTH = 16
class hwtLib.logic.crcPoly.CRC_16_T10_DIF[source]

Bases: CRC_POLY

Used in SCSI DIF

POLY = 35767
WIDTH = 16
class hwtLib.logic.crcPoly.CRC_16_USB[source]

Bases: object

CHECK = 46280
INIT = 65535
POLY = 32773
REFIN = True
REFOUT = True
RESIDUE = 45057
WIDTH = 16
XOROUT = 65535
class hwtLib.logic.crcPoly.CRC_17_CAN[source]

Bases: CRC_POLY

Used in CAN FD

POLY = 92251
WIDTH = 17
class hwtLib.logic.crcPoly.CRC_21_CAN[source]

Bases: CRC_POLY

Used in CAN FD

POLY = 1058969
WIDTH = 21
class hwtLib.logic.crcPoly.CRC_24[source]

Bases: CRC_POLY

Used in FlexRay

POLY = 6122955
WIDTH = 24
class hwtLib.logic.crcPoly.CRC_24_Radix_64[source]

Bases: CRC_POLY

Used in OpenPGP, RTCM104v3

POLY = 8801531
WIDTH = 24
class hwtLib.logic.crcPoly.CRC_30[source]

Bases: CRC_POLY

Used in CDMA

POLY = 540064199
WIDTH = 30
class hwtLib.logic.crcPoly.CRC_32[source]

Bases: CRC_POLY

Used in HDLC, ANSI X3.66, ITU-T V.42, Ethernet, Serial ATA, MPEG-2, PKZIP, Gzip, Bzip2, PNG, many others

INIT = 4294967295
POLY = 79764919
REFIN = True
REFOUT = True
RESIDUE = 3338984827
WIDTH = 32
XOROUT = 4294967295
class hwtLib.logic.crcPoly.CRC_32C[source]

Bases: CRC_POLY

Used in (Castagnoli), iSCSI, SCTP, G.hn payload, SSE4.2, Btrfs, ext4, Ceph

CHECK = 3808858755
INIT = 4294967295
POLY = 517762881
REFIN = True
REFOUT = True
RESIDUE = 3080238136
WIDTH = 32
XOROUT = 4294967295
class hwtLib.logic.crcPoly.CRC_32K[source]

Bases: CRC_POLY

Koopman {1,3,28}

POLY = 1947962583
WIDTH = 32
class hwtLib.logic.crcPoly.CRC_32K_2[source]

Bases: CRC_POLY

Koopman {1,1,30}

POLY = 844641433
WIDTH = 32
class hwtLib.logic.crcPoly.CRC_32Q[source]

Bases: CRC_POLY

Used in aviation; AIXM

POLY = 2168537515
WIDTH = 32
class hwtLib.logic.crcPoly.CRC_3_GSM[source]

Bases: CRC_POLY

Used in mobile networks

INIT = 0
POLY = 3
WIDTH = 3
XOROUT = 7
class hwtLib.logic.crcPoly.CRC_40_GSM[source]

Bases: CRC_POLY

Used in GSM control channel[40][41]

POLY = 75628553
WIDTH = 40
class hwtLib.logic.crcPoly.CRC_4_ITU[source]

Bases: CRC_POLY

G.704

CHECK = 7
POLY = 3
REFIN = True
REFOUT = True
RESIDUE = 0
WIDTH = 4
class hwtLib.logic.crcPoly.CRC_5_EPC[source]

Bases: CRC_POLY

Gen 2 RFID EPC-C1G2

CHECK = 0
POLY = 9
RESIDUE = 0
WIDTH = 5
class hwtLib.logic.crcPoly.CRC_5_ITU[source]

Bases: CRC_POLY

G.704

POLY = 21
WIDTH = 5
class hwtLib.logic.crcPoly.CRC_5_USB[source]

Bases: CRC_POLY

USB token packets

CHECK = 25
INIT = 31
POLY = 5
REFIN = True
REFOUT = True
RESIDUE = 12
WIDTH = 5
XOROUT = 31
class hwtLib.logic.crcPoly.CRC_64_ECMA[source]

Bases: CRC_POLY

Used in ECMA-182, XZ Utils

POLY = 4823603603198064275
WIDTH = 64
class hwtLib.logic.crcPoly.CRC_64_ISO[source]

Bases: CRC_POLY

Used in HDLC, Swiss-Prot/TrEMBL; considered weak for hashing

POLY = 27
WIDTH = 64
class hwtLib.logic.crcPoly.CRC_6_CDMA2000_A[source]

Bases: CRC_POLY

Used in mobile networks

POLY = 39
WIDTH = 6
class hwtLib.logic.crcPoly.CRC_6_CDMA2000_B[source]

Bases: CRC_POLY

Used in mobile networks

POLY = 7
WIDTH = 6
class hwtLib.logic.crcPoly.CRC_6_DARC[source]

Bases: CRC_POLY

Data Radio Channel

POLY = 25
WIDTH = 6
class hwtLib.logic.crcPoly.CRC_6_GSM[source]

Bases: CRC_POLY

Used in mobile networks

POLY = 47
WIDTH = 6
class hwtLib.logic.crcPoly.CRC_6_ITU[source]

Bases: CRC_POLY

Used in G.704

POLY = 3
WIDTH = 6
class hwtLib.logic.crcPoly.CRC_7[source]

Bases: CRC_POLY

Used in telecom systems, G.707,G.832, MMC, SD

POLY = 9
WIDTH = 7
class hwtLib.logic.crcPoly.CRC_7_MVB[source]

Bases: CRC_POLY

Used in Train Communication Network, IEC 60870-5

POLY = 101
WIDTH = 7
class hwtLib.logic.crcPoly.CRC_8[source]

Bases: CRC_POLY

Used in DVB-S2

POLY = 213
WIDTH = 8
class hwtLib.logic.crcPoly.CRC_8_AUTOSAR[source]

Bases: CRC_POLY

Used in automotive integration, OpenSafety

POLY = 47
WIDTH = 8
class hwtLib.logic.crcPoly.CRC_8_Bluetooth[source]

Bases: CRC_POLY

Used in wireless connectivity

POLY = 167
WIDTH = 8
class hwtLib.logic.crcPoly.CRC_8_CCITT[source]

Bases: CRC_POLY

Used in I.432.1; ATM HEC, ISDN HEC and cell delineation

CHECK = 244
POLY = 7
RESIDUE = 0
WIDTH = 8
class hwtLib.logic.crcPoly.CRC_8_DARC[source]

Bases: CRC_POLY

Used in Data Radio Channel

POLY = 57
WIDTH = 8
class hwtLib.logic.crcPoly.CRC_8_Dallas_Maxim[source]

Bases: CRC_POLY

Used in 1-Wire bus

POLY = 49
WIDTH = 8
class hwtLib.logic.crcPoly.CRC_8_GSM_B[source]

Bases: CRC_POLY

Used in mobile networks

POLY = 73
WIDTH = 8
class hwtLib.logic.crcPoly.CRC_8_SAE_J1850[source]

Bases: CRC_POLY

Used in AES3

POLY = 29
WIDTH = 8
class hwtLib.logic.crcPoly.CRC_8_WCDMA[source]

Bases: CRC_POLY

Used in mobile networks

CHECK = 37
INIT = 0
POLY = 155
REFIN = True
REFOUT = True
RESIDUE = 0
WIDTH = 8
class hwtLib.logic.crcPoly.CRC_POLY[source]

Bases: object

Base class for crc configuration specifications

INIT = 0
POLY = None
REFIN = False
REFOUT = False
WIDTH = None
XOROUT = 0

hwtLib.logic.crcUtils module

hwtLib.logic.crcUtils.parsePolyStr(polyStr, width)[source]
hwtLib.logic.crcUtils.parsePolyStr_parse_n(string)[source]

Parse the number part of a polynomial string term

hwtLib.logic.crcUtils.parsePolyStr_parse_p(string)[source]

Parse the power part of a polynomial string term

hwtLib.logic.crc_test_utils module

class hwtLib.logic.crc_test_utils.NaiveCrcAccumulator(params: CRC_POLY, value: Optional[int] = None)[source]

Bases: object

Holds the intermediate state of the CRC algorithm.

Based on http://www.nightmare.com/~ryb/

__init__(params: CRC_POLY, value: Optional[int] = None)[source]
Parameters

value – The initial register value to use. The result previous of a previous CRC calculation, can be used here to continue calculation with more data. If this parameter is None or not given, the register will be initialized with algorithm’s default seed value.

getFinalValue()[source]

Return the current value of the register as an integer with xorMask applied. This can be used after all input data is processed to obtain the final result.

getValue()[source]

Return the current value of the register as an integer.

reset()[source]

Reset the state of the register with the default seed value.

takeBit(bit: int)[source]

Process a single input bit.

takeWord(word: int, width: int)[source]

Process a binary input word.

Parameters

word – The input word. Since this can be a Python long, there is no coded limit to the number of bits the word can represent.

hwtLib.logic.crc_test_utils.naive_crc(dataBits, crcBits, polyBits, refin=False, refout=False)[source]

hwtLib.logic.lfsr module

class hwtLib.logic.lfsr.Lfsr(hdl_name_override: Optional[str] = None)[source]

Bases: Unit

Linear shift feedback register generator, form of hardware pseudorandom generator.

HDL params

  • POLY_WIDTH - default value 8 of type int

  • POLY - default value 136 of type int

  • INIT - default value 1 of type int

HDL IO
schematic
class hwtLib.logic.lfsr.LfsrTC(methodName='runTest')[source]

Bases: SimTestCase

classmethod setUpClass()[source]

Hook method for setting up class fixture before running tests in the class.

test_simple()[source]

hwtLib.logic.oneHotToBin module

class hwtLib.logic.oneHotToBin.OneHotToBin(hdl_name_override: Optional[str] = None)[source]

Bases: Unit

Converts one hot signal to binary, bin.vld is high when oneHot != 0

HDL params

  • ONE_HOT_WIDTH - default value 8 of type int

HDL IO
schematic
hwtLib.logic.oneHotToBin.oneHotToBin(parent, signals: Union[RtlSignal, Signal, List[Union[RtlSignal, Signal]]], resName='oneHotToBin')[source]

hwtLib.logic.pid module

class hwtLib.logic.pid.PidController(hdl_name_override: Optional[str] = None)[source]

Bases: Unit

The PID Control block compares the input to the target and calculates an error. Based on this error, a output value is calculated that should result in a smaller error on the next iteration of the loop, assuming your parameters are tuned properly.

u(k) = u(k-1) + a0*e(k) + a1*y(k) + a2*y(k-1) + a3*y(k-2)

e(k): error in this step (= target value - input) y(k): input in step k ax: PID coeficient

The PID parameter inputs for this equation are slightly different from the traditional K_p, K_i, and K_d.

a0 = K_i * T_s a1 = -K_p - K_d / T_s a2 = K_p + 2K_d/T_s a3 = - K_d / T_s

HDL params

  • DATAIN_WIDTH - default value 16 of type int

  • DATAOUT_WIDTH - default value 16 of type int

  • COEF_WIDTH - default value 16 of type int

HDL IO
schematic
static compute_coefs(K_p, K_i, K_d, T_s)[source]